Moore’s Law states that the number of transistors on an integrated circuit doubles every two years—a phenomenon that Intel has been upholding for decades. But with Intel’s announcement of its 2016 silicon, the law stutters.
The dramatic increase in the number of transistors aboard integrated circuitry is made possible by shrinking them using new manufacturing processes. The last advance in Intel’s chips was to move to a design that created 14 nanometer transistors aboard its Broadwell processors—and if Moore’s Law was to hold, we’d expect smaller ones to arrive in 2016.
But Intel has announced that its 2016 chip line-up, called Kaby Lake, will continue to use 14 nanometer processes. Instead, the next shrinkage will arrive in the second half of 2017, when Intel will shift to transistors that measure just 10 nanometers in its Cannonlake chips.
During a call yesterday on the topic, Intel’s CEO Brian Krzanich mused on Intel’s adherence to Moore’s Law. He explained that “the last two technology transitions have signalled that our cadence today is closer to 2.5 years than two.” In other words, the delay of 10-nanometer processes puts Moore’s law on hold.
Indeed, the limit of what can be done with conventional silicon is fast being approached. Just last week, IBM announced that it can create 7-nanometer transistors, but using silicon-germanium in the manufacturing process rather than pure silicon. The new material choice allows transistors to switch faster and also use less power—in turn allowing them to sit more densely on a chip.
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